1. Field
Embodiments of the disclosure generally relate to a method and apparatus for forming a thin-film transistor device.
2. Description of the Background Art
Several trends in the evolution of flat screen displays are driving research and development efforts to improve the display performance or display manufacturability, such as larger screen sizes, smaller pixel sizes, LED-based pixels and reduced power consumption of the display. The latter three of these relate to thin film transistors (TFTs) which control the pixels within a display. Because indium gallium zinc oxide (IGZO) films can be made with a carrier mobility 20-50 times greater than that of amorphous silicon, TFTs that have IGZO channels can result in display devices, which are smaller, transparent and have reduced power consumption characteristics as compared to devices that contain an amorphous silicon containing channel layer.
A flat screen display typically contains a rectangular array of pixels, where the pixel is either a light switch (e.g., LCD) or a light source (e.g., OLED). In either case, most displays utilize one transistor for switching or controlling each pixel.
TFTs are a type of field effect transistor (FET). TFTs can be formed by depositing and lithographically patterning a series of layers that are formed over a substrate, such as a glass substrate. Semiconducting thin film materials, such as amorphous silicon or a metal-oxide semiconductor, typically form at least part of the semiconducting channel region of a TFT device, that is formed between a source and a drain. A gate is located in proximity to the channel, so that when a voltage is applied to the gate it can produce an electric field that affects the ability of carriers to move between the source and drain regions. By applying a voltage to a gate, a source-drain current can be turned on or turned off, thus forming a switch or an amplifier.
IGZO thin films have been deposited using methods, such as physical vapor deposition (PVD), atomic layer deposition (ALD), and chemical vapor deposition (CVD) processes. The other layers deposited in the manufacturing of a display TFT, such as metals, dielectrics or electrically insulating layers, may also utilize these deposition methods.
Due to the electrical and mechanical properties of an IGZO layer, process development efforts have shown that IGZO layers can help to reduce the pixel size, reduced TFT power consumption, and even form high resolution OLED products. However, the formation of an IGZO layer has its own set of challenges. First of all, PVD IGZO films are limited to stoichiometries of the formed PVD target material, which typically have a composition of either 5:1:1 or 1:1:1 (indium:gallium:zinc ratios), where the oxygen component of the IGZO film is introduced through reactive sputtering or a post-deposition treatment. This not only limits PVD IGZO process development, but limits a PVD deposited IGZO containing structure to a single layer having either a 5:1:1 composition or a 1:1:1 composition, or to a bi-layer structure, where one film has 5:1:1 composition and the other has a 1:1:1 composition. Finally, a PVD bi-layer process requires two separate PVD chambers, which is more expensive in production than a single-chamber process. In this disclosure, the words “layer” and “film” are used interchangeably; and the term “sublayer” is meant to denote a part of a layer.
Another problem with IGZO films is their susceptibility to environmental degradation, reported as the diffusion of hydrogen atoms into the IGZO active layer which affects transistor properties. Moving substrates between processing systems introduces exposure to atmospheric humidity, which can be absorbed into substrates and the deposited films. Native oxides can also form on materials exposed to air.
Therefore, there is a need for a method and apparatus for forming thin film transistor device that includes an indium gallium zinc oxide (IGZO) layer that solves the problems described above.